Micron
DRAM Memory Design Engineer - Principal | MTS | SMTS
Full-timeNot specifiedBoise, ID - Main SiteNot disclosedApply by 13 Oct 2026
Overview
Micron is hiring a DRAM Memory Design Engineer - Principal | MTS | SMTS in Boise, ID - Main Site. This is a senior leadership role focused on Figma, Interaction design, Design systems. Full responsibilities, compensation details and the application form are available on the official listing, apply directly to keep your application verified.
What you'll do
- Own day-to-day delivery as a DRAM Memory Design Engineer - Principal | MTS | SMTS, working with Figma, Interaction design, Design systems.
- Partner with engineering, product and design peers at Micron to ship work that reaches real users.
- Write clear documentation and keep stakeholders updated on progress, risks and trade-offs.
- Review your own and others' work to keep quality, performance and reliability high.
Requirements
- Practical experience with Figma, Interaction design, Design systems.
- Relevant academic or project background for a DRAM Memory Design Engineer - Principal | MTS | SMTS role.
- Strong written and verbal communication in English.
- Comfortable working on-site in Boise, ID - Main Site.
Skills
FigmaInteraction designDesign systems